Welcome to ARCHIMANTIX!
Hi, I'm Saber. This blog is where I share thoughts, lessons, experiments and dev logs from my work (and curiosity) in computer architecture, simulation tools, and the broader world of systems research.
ARCHIMANTIX
ISA Extension in gem5 | Part 2 : Tag Manipulation Instructions
Implementing ADDG, SUBG, and GMI, the arithmetic tag manipulation instructions of Arm MTE.
ISA Extension in gem5 | Part 1 : The First Instruction
What an ISA is and how to extend one? How gem5's ISA description system is structured, and adding a first concrete instruction, Arm MTE's IRG, as an end-to-end example.
Advertising a CPU Feature in gem5 | Part 2: Adding System Registers
Once you advertise a CPU feature in gem5, software reaches for its system registers. How to add system registers in gem5, using Arm MTE as the example.
Advertising a CPU Feature in gem5 | Part 1: Telling Software It Exists
How to advertise a new CPU feature to software in gem5's full-system mode, using Arm Memory Tagging Extension (MTE) as an example.
Arm Pointer Authentication in gem5
A deep dive into gem5's FEAT_PAUTH implementation, what works, what doesn't, and how to fix the missing fault behavior.